Involved in all procedures of the production of final products from semiconductor devices, an electronic packaging technology is a system fabrication methodology covering a wide range of versatile techniques. With great advances in technology in recent years, semiconductor fabrication techniques have enabled the integration of one million or more cells, the multiplication of I/O pins, the enlargement of die sizes, the rapid radiation of large amounts of heat, and the high electrical performance of semiconductor devices. However, the progress of electronic packaging technology, which is utilized to encapsulate these semiconductor devices in some form of sealed package so as to protect them from external or internal damage, has consistently lagged behind the progress of semiconductor fabrication techniques.
In determining the performance, dimension, price and reliability of a final semiconductor device product, the electronic package technology is one of the most important factors. Chips 20 are typically fabricated on a wafer, for example wafer 10 shown in FIG. 1. The wafer is then singulated, i.e., separated into individual chips for subsequent packaging. Packaging generally includes putting the chip into a package as well as electrical connection of the chip I/O pins to the package contacts. A variety of packages and electrical connection methods have been developed. In one approach, wire bonding is used to connect the chip I/O pins to the package contacts. Wire bonding may be time consuming, and the wires may be relatively fragile and may require relatively large amounts of space within the package. A flip-chip approach may also be used. In the flip-chip process, a chip is fabricated with contacts on its top surface and then flipped for attachment of those contacts to a substrate (e.g., a circuit board). However, this has a drawback in that the production efficiency is poor in terms of process complexity and product cost because it typically requires conventional solder-using complex connection processes, that is, solder flux coating, chip/board arranging, solder bump reflowing, flux removing, underfill filling and curing processes. Moreover, flip-chip processes are generally performed on individually, pre-singulated devices, and thus uniformity and repeatability are often problematic.
In some applications, it is desirable to encapsulate the chip, for example to encapsulate a flip chip. This may be done for a variety of reasons, for example to protect the chip or to provide some enhanced functionality by virtue of the encapsulation. Such encapsulation is often performed on individually, pre-singulated devices, resulting in relatively high cost and, in the case where the encapsulation provides enhanced functionality, the uniformity and repeatability of this are often problematic. For example in the case of light-emitting devices, for example light-emitting diodes (LEDs), the encapsulant may provide enhanced functionality by including a light-conversion material that absorbs a portion of the light emitted by the LED and re-emits it at a different wavelength. Such a configuration may be used to produce light of different colors or different spectral power distributions. In one example, the LED emits light in the UV to blue wavelength range, and the combination of the LED and the light-conversion material produces substantially white light. Performing such encapsulation on an individual die basis (i.e., die-by-die) may result in variations in color (for example white point), resulting in low yield and increased cost.
In view of the foregoing, there is a need for a more uniform and less complex flip-chip-based packaging process for electronic devices fabricated on semiconductor substrates.